Electroplating apparatus

ABSTRACT

Embodiments of the invention contemplate the formation of a low cost solar cell using a novel high speed electroplating method and apparatus to form a metal contact structure having selectively formed metal lines using an electrochemical plating process. The apparatus and methods described herein remove the need to perform one or more high temperature screen printing processes to form conductive features on the surface of a solar cell substrate. The resistance of interconnects formed in a solar cell device greatly affects the efficiency of the solar cell. It is thus desirable to form a solar cell device that has a low resistance connection that is reliable and cost effective. Therefore, one or more embodiments of the invention described herein are adapted to form a low cost and reliable interconnecting layer using an electrochemical plating process containing a common metal, such as copper.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a continuation of co-pending U.S. patent applicationSer. No. 11/566,201, filed Dec. 1, 2006, which is herein incorporated byreference.

BACKGROUND OF THE INVENTION

1. Field of the Invention

Embodiments of the present invention generally relate to the fabricationof photovoltaic cells.

2. Description of the Related Art

Solar cells are photovoltaic devices that convert sunlight directly intoelectrical power. The most common solar cell material is silicon, whichis in the form of single or polycrystalline wafers. Because theamortized cost of forming a silicon-based solar cells to generateelectricity is higher than the cost of generating electricity usingtraditional methods, there has been an effort to reduce the cost to formsolar cells.

FIGS. 1A and 1B schematically depicts a standard silicon solar cell 100fabricated on a wafer 110. The wafer 110 includes a p-type base region101, an n-type emitter region 102, and a p-n junction region 103disposed therebetween. An n-type region, or n-type semiconductor, isformed by doping the semiconductor with certain types of elements (e.g.,phosphorus (P), arsenic (As), or antimony (Sb)) in order to increase thenumber of negative charge carriers, i.e., electrons. Similarly, a p-typeregion, or p-type semiconductor, is formed by the addition of trivalentatoms to the crystal lattice, resulting in a missing electron from oneof the four covalent bonds normal for the silicon lattice. Thus, thedopant atom can accept an electron from a neighboring atom's covalentbond to complete the fourth bond. The dopant atom accepts an electron,causing the loss of half of one bond from the neighboring atom andresulting in the formation of a “hole”.

When light falls on the solar cell, energy from the incident photonsgenerates electron-hole pairs on both sides of the p-n junction region103. Electrons diffuse across the p-n junction to a lower energy leveland holes diffuse in the opposite direction, creating a negative chargeon the emitter and a corresponding positive charge builds up in thebase. When an electrical circuit is made between the emitter and thebase and the p-n junction is exposed to certain wavelengths of light, acurrent will flow. The electrical current generated by the semiconductorwhen illuminated flows through contacts disposed on the frontside 120,i.e. the light-receiving side, and the backside 121 of the solar cell100. The top contact structure, as shown in FIG. 1A, is generallyconfigured as widely-spaced thin metal lines, or fingers 104, thatsupply current to a larger bus bar 105. The back contact 106 isgenerally not constrained to be formed in multiple thin metal lines,since it does not prevent incident light from striking solar cell 100.Solar cell 100 is generally covered with a thin layer of dielectricmaterial, such as Si₃N₄, to act as an anti-reflection coating 111, orARC, to minimize light reflection from the top surface of solar cell100.

In the interest of simplified assembly and higher efficiency of solarcells, a solar cell has been developed, wherein a plurality of holes isformed through the solar cell substrate and serves as vias forinterconnection of the top contact structure to a backside conductor byusing pins. This solar cell design is referred to as a pin-up module, orPUM. One advantage of the PUM concept is the elimination of the busbars,such as bus bar 105 illustrated in FIG. 1A, from covering thelight-receiving side of the substrate, thereby increasing efficiency ofthe cell. Another is that resistive losses are reduced because currentproduced by the solar cell is collected at holes equally spaced over thesubstrate rather than requiring some of the connections to extend acrossthe surface of the solar cell. Further, resistive losses experienced bya PUM connected device will not increase as the solar cell surface areaincreases and, hence, larger solar cells may be manufactured without aloss in efficiency.

FIG. 1C is a partial schematic cross section of one example of a PUMcell 130 showing a contact 134. Similar to a standard solar cell, suchas solar cell 100, PUM cell 130 includes a single crystal silicon wafer110 with a p-type base region 101, an n-type emitter region 102, and ap-n junction region 103 disposed therebetween. PUM cell 130 alsoincludes a plurality of through-holes 131, which are formed between thelight-receiving surface 132 and the backside 133 of PUM cell 130. Thethrough-holes 131 allow the formation of contact 134 between thelight-receiving surface 132 and the backside 133. Disposed in eachthrough-hole 131 is a contact 134, which includes a top contactstructure 135 disposed on light-receiving surface 132, a backsidecontact 136 disposed on backside 133, and an interconnect 137, whichfills through-hole 131 and electrically couples top contact structure135 and backside contact 136. An anti-reflective coating 107 may also beformed on light receiving surface 132 to minimize reflection of lightenergy therefrom. A backside contact 139 completes the electricalcircuit required for PUM cell 130 to produce a current by forming anohmic contact with p-type base region 101 of the silicon wafer 110.

The fingers 104 (FIG. 1B) or contact 134 (FIG. 1C) are in contact withthe substrate are adapted to form an ohmic connection with doped region(e.g., n-type emitter region 102). An ohmic contact is a region on asemiconductor device that has been prepared so that the current-voltage(I-V) curve of the device is linear and symmetric, i.e., there is nohigh resistance interface between the doped silicon region of thesemiconductor device and the metal contact. Low-resistance, stablecontacts are critical for the performance of the solar cell andreliability of the circuits formed in the solar cell fabricationprocess. Hence, after the fingers 104, or contacts 134, have been formedon the light-receiving surface and on the backside, an annealing processof suitable temperature and duration is typically performed in order toproduce the necessary low resistance metal silicide at thecontact/semiconductor interface. A backside contact completes theelectrical circuit required for solar cell to produce a current byforming an ohmic contact with p-type base region of the substrate.

Wider the current carrying metal lines (e.g., fingers 104, contact 134)are on the light-receiving surface of the solar cell the lower theresistance losses, but the higher the shadowing losses due to thereduced effective surface area of the light-receiving surface.Therefore, maximizing solar cell efficiency requires balancing theseopposing design constraints. FIG. 1D illustrates a plan view of oneexample of a top contact structure 135 for a PUM cell, wherein thefinger width and geometry have been optimized to maximize cellefficiency for the cell. In this configuration, a top contact structure135 for a PUM cell is configured as a grid electrode 138, which consistsof a plurality of various width finger segments 135A. The width of aparticular finger segment 135A is selected as a function of the currentto be carried by that finger segment 135A. In addition, finger segments135A are configured to branch as necessary to maintain finger spacing asa function of finger width. This minimizes resistance losses as well asshadowing by finger segments 135A.

Traditionally, the current carrying metal lines, or conductors, arefabricated using a screen printing process in which a silver-containingpaste is deposited in a desired pattern on a substrate surface and thenannealed. However, there are several issues with this manufacturingmethod. First, the thin fingers of the conductors, when formed by thescreen printing process, may be discontinuous since the fingers formedusing a metal paste do not always agglomerate into a continuousinterconnecting line during the annealing process. Second, porositypresent in the fingers formed during the agglomeration process resultsin greater resistive losses. Third, electrical shunts may be formed bydiffusion of the metal (e.g., silver) from the contact into the p-typebase region or on the surface of the substrate backside. Shunts on thesubstrate backside are caused by poor definition of backside contactssuch as waviness, and/or metal residue. Fourth, due to the relativelythin substrate thicknesses commonly used in solar cell applications,such as 200 micrometers and less, the act of screen printing the metalpaste on the substrate surface can cause physical damage to thesubstrate. Lastly, silver-based paste is a relatively expensive materialfor forming conductive components of a solar cell.

One issue with the current method of forming metal interconnects using ascreen printing process that utilizes a metal particle containing pasteis that the process of forming the patterned features requires hightemperature post-processing steps to densify the formed features andform a good electrical contact with the substrate surface. Due to theneed to perform a high temperature sintering process the formedinterconnect lines will have a high extrinsic stress created by thedifference in thermal expansion of the substrate material and the metallines. A high extrinsic stress, or even intrinsic stress, formed in themetal interconnect lines is an issue, since it can cause breakage of theformed metallized features, warping of the thin solar cell substrate,and/or delamination of the metallized features from the surface of thesolar cell substrate. The high temperature post processing step can alsocause the material in the solar cell device to diffuse into unwantedregions of the device, thus causing device problems, such as anelectrical short. High temperature processes also limit the types ofmaterials that can be used to form a solar cell due to the breakdown ofcertain materials at the high sintering temperatures. Also, screenprinting processes also tend to be non-uniform, unreliable and oftenunrepeatable. Therefore, there is a need to form a low stressinterconnect line that forms a strong bond to the surface of thesubstrate.

Another approach to forming very thin, robust current carrying metallines on the surface of a solar cell substrate involves cutting groovesin the surface of the substrate with a laser. The grooves aresubsequently filled by an electroless plating method. However thelaser-cut grooves are a source of macro- and micro-defects. Thelaser-cut edge is not well defined, causing waviness on the fingeredges, and the heat of the laser introduces defects into the silicon.

The effectiveness of a solar cell substrate fabrication process is oftenmeasured by two related and important factors, which are device yieldand the cost of ownership (COO). These factors are important since theydirectly affect the cost to produce an solar cell device and thus adevice manufacturer's competitiveness in the market place. The CoO,while affected by a number of factors, is greatly affected by the systemand chamber throughput or simply the number of substrates per hourprocessed using a desired processing sequence. A process sequence isgenerally defined as the sequence of device fabrication steps, orprocess recipe steps, completed in one or more processing chambers thatare used to form a solar cell. A process sequence may generally containvarious substrate (or wafer) fabrication processing steps. If thesubstrate throughput is not limited by the time to transfer the solarcell substrates then the longest process recipe step will generallylimit the throughput of the processing sequence, increase the CoO andpossibly make a desirable processing sequence impractical.

Therefore, there is a need for a system, a method and an apparatus thatcan process a substrate so that it can meet the required deviceperformance goals and increase the system throughput and thus reduce theprocess sequence CoO. There is also a need for a low cost method offorming a contact structure for solar cells that have a low resistivityand clearly defined features.

SUMMARY OF THE INVENTION

Embodiments of the present invention generally provide a method offorming a solar cell device, comprising positioning a solar cellsubstrate in a first processing chamber, the solar cell substrate havinga first region and a second region that comprise elements that are usedto form a solar cell device, forming a first conductive layer on thefirst region and the second region in the first processing chamber, andforming a second conductive layer on the first conductive layer using anelectrochemical plating process, wherein forming the second conductivelayer comprises forming a first metal layer on at least a portion of thefirst conductive region, and forming a second metal layer on at least aportion of the second conductive region.

Embodiments of the present invention may further provide a method offorming a solar cell device, comprising positioning a solar cellsubstrate in a first processing chamber, the solar cell substrate havinga first region and a second region that comprise elements that are usedto form a solar cell device, forming a first conductive layer over aportion of the first region and the second region in the firstprocessing chamber, and forming a second conductive layer over a portionof the first conductive layer using an electrochemical plating process,wherein forming the second conductive layer comprises disposing amasking plate having first surface and a plurality of apertures formedtherein over at least a portion of the first conductive layer, whereinthe plurality of apertures are in communication with a first surface,contacting the first conductive layer with an electrical contact, andforming the second conductive layer over the first conductive layer byimmersing the substrate and an electrode in a first electrolyte andelectrically biasing the electrical contact relative to the electrode,wherein the second metal layer is simultaneously formed within the areasexposed by apertures formed in the masking plate.

Embodiments of the present invention may further provide a method offorming a solar cell device, comprising positioning a solar cellsubstrate in a first processing chamber, the solar cell substrate havinga first region and a second region that comprise elements that are usedto form a solar cell device, forming a first conductive layer over aportion of the first region and the second region in the firstprocessing chamber, and forming a second conductive layer over a portionof the first conductive layer using an electrochemical plating process,wherein forming the second conductive layer comprises depositing amasking material over the first conductive layer, forming a plurality ofapertures in the masking layer to expose desired regions of the firstconductive layer, contacting the first conductive layer with anelectrical contact, and forming the second metal layer over the firstconductive layer by immersing the substrate and an electrode in a firstelectrolyte and electrically biasing the electrical contact relative tothe electrode.

BRIEF DESCRIPTION OF THE DRAWINGS

So that the manner in which the above recited features of the presentinvention can be understood in detail, a more particular description ofthe invention, briefly summarized above, may be had by reference toembodiments, some of which are illustrated in the appended drawings. Itis to be noted, however, that the appended drawings illustrate onlytypical embodiments of this invention and are therefore not to beconsidered limiting of its scope, for the invention may admit to otherequally effective embodiments.

FIG. 1A illustrates an isometric view of prior art solar cell containinga front side metallization interconnect pattern.

FIG. 1B illustrates a cross-sectional side view of a prior art solarcell shown in FIG. 1A.

FIG. 1C illustrates a cross-sectional view of a prior art PUM typedevice.

FIG. 1D illustrates a plan view of a top contact structure of a PUMcell, wherein the finger width and geometry have been optimized tomaximize cell efficiency.

FIG. 2 illustrates a solar cell process sequence according to oneembodiment described herein.

FIGS. 3A-3F illustrate schematic cross-sectional views of a solar cellduring different stages of the process sequence described in FIG. 2.

FIG. 4A illustrates a side cross-sectional view of an electrochemicalprocessing chamber according to one embodiment described herein.

FIG. 4B illustrates is an isometric view of various electrochemicalprocessing chamber components according to one embodiment describedherein.

FIG. 4C illustrates is an isometric view of various electrochemicalprocessing chamber components according to one embodiment describedherein.

FIG. 4D illustrates a side cross-sectional view of an electrochemicalprocessing chamber according to one embodiment described herein.

FIGS. 5A-5F illustrate an isometric view of a substrate having anelectrochemically deposited layer formed thereon according to oneembodiment described herein.

FIG. 6 illustrates a graph of the effect of temperature on depositionrate according to one embodiment described herein.

FIG. 7A illustrates a side cross-sectional view of a batchelectrochemical deposition chamber according to one embodiment describedherein.

FIG. 7B illustrates a plan view of a batch electrochemical depositionsystem according to one embodiment described herein.

FIG. 7C illustrates an isometric view of a batch electrochemicaldeposition chamber according to one embodiment described herein.

FIG. 7D illustrates a side cross-sectional view of a batchelectrochemical deposition chamber according to one embodiment describedherein.

FIG. 7E illustrates an isometric view of a head assembly according toone embodiment described herein.

FIG. 7F illustrates a close-up isometric view of the head assemblyillustrated in FIG. 7E according to one embodiment described herein.

FIG. 7G illustrates a cross-sectional view of a batch electrochemicaldeposition system according to one embodiment described herein.

FIG. 7H illustrates an isometric view of a batch electrochemicaldeposition system according to one embodiment described herein.

FIG. 7I illustrates a plan view of a batch electrochemical depositionsystem according to one embodiment described herein.

FIG. 8 illustrates a solar cell process sequence according to oneembodiment described herein.

FIGS. 9A-9E illustrate schematic cross-sectional views of a solar cellduring different stages of the process sequence described in FIG. 8.

FIG. 10 illustrates a solar cell process sequence according to oneembodiment described herein.

FIGS. 11A-11H illustrate schematic cross-sectional views of a solar cellduring different stages of the process sequence described in FIG. 10.

For clarity, identical reference numerals have been used, whereapplicable, to designate identical elements that are common betweenfigures. It is contemplated that features of one embodiment may beincorporated in other embodiments without further recitation.

DETAILED DESCRIPTION

Embodiments of the invention contemplate the formation of a low costsolar cell using a novel high speed electroplating method and apparatusto form a metal contact structure having selectively formed metal linesusing an electrochemical plating process. The apparatus and methodsdescribed herein remove the need to perform one or more high temperaturescreen printing processes to form conductive features on the surface ofa solar cell substrate. Solar cell substrates that may benefit from theinvention include substrates composed of single crystal silicon,multi-crystalline silicon, polycrystalline silicon, germanium (Ge), andgallium arsenide (GaAs), cadmium telluride (CdTe), cadmium sulfide(CdS), copper indium gallium selenide (CIGS), copper indium selenide(CulnSe₂), gallilium indium phosphide (GaInP₂), as well asheterojunction cells, such as GaInP/GaAs/Ge or ZnSe/GaAs/Ge substrates.The solar cell substrates may be formed in a square, rectangular,circular or any other desirable shape.

The resistance of interconnects formed in a solar cell device greatlyaffects the efficiency of the solar cell. It is thus desirable to form asolar cell device that has a low resistance connection that is reliableand cost effective. As noted above, silver (Ag) interconnecting linesformed from a silver paste is one of the currently the preferredinterconnecting method. However, while silver has a lower resistivity(e.g., 1.59×10⁻⁸ ohm-m) than other common metals such as copper (e.g.,1.7×10⁻⁸ ohm-m) and aluminum (e.g., 2.82×10⁻⁸ ohm-m) it costs orders ofmagnitude more than these other common metals. Therefore, one or moreembodiments of the invention described herein are adapted to form a lowcost and reliable interconnecting layer using an electrochemical platingprocess containing a common metal, such as copper. However, generallythe electroplated portions of the interconnecting layer may contain asubstantially pure metal or a metal alloy layer containing copper (Cu),silver (Ag), gold (Au), tin (Sn), cobalt (Co), nickel (Ni), zinc (Zn),lead (Pb), palladium (Pd), and/or aluminum (Al). Preferably, theelectroplated portion of the interconnect layer contains substantiallypure copper or a copper alloy.

FIG. 2 illustrates a series of method steps 200 that are used to formmetal contact structures on a solar cell device using the apparatusdescribed herein. The processes described below may be used to form asolar cell having interconnects formed using any conventional deviceinterconnection style or technique. Thus while the embodiments describedherein are discussed in conjunction with the formation of a device thathas the electrical contacts to the n-type and p-type junctions onopposing sides of the substrate this interconnect configuration is notintended to be limiting as to the scope of the invention, since otherdevice configurations, such as PUM or multilayer buried contactstructures (both contacts on one side), may be formed using theapparatus and methods described herein without varying from the basicscope of the invention.

FIGS. 3A-3E illustrate the various states of a metallized substrate 320after each step of method steps 200 has been performed. The method steps200 start with step 202 in which a substrate 301 (FIG. 3A) is formedusing conventional solar cell and/or semiconductor fabricationtechniques. The substrate 301 may be formed from single crystal orpolycrystalline silicon materials. Examples of these substratefabrication process are the EFG process (Edge-defined Film-fed Growth)(e.g., U.S. Pat. No. 5,106,763), the RGS (Ribbon Growth on Substrate)process (e.g., U.S. Pat. No. 4,670,096, U.S. Pat. No. 5,298,109, DE4,105,910 A1) and the SSP ribbon process (Silicon Sheets from Powder)(e.g., U.S. Pat. No. 5,336,335, U.S. Pat. No. 5,496,446, U.S. Pat. No.6,111,191, and U.S. Pat. No. 6,207,891). In one example an n-type region302 is disposed over the substrate 301 that has been doped with a p-typedopant. The n-type region 302 can be formed using conventional chemicalvapor deposition (CVD) process, by driving-in an n-type dopant using adiffusion furnace, or other similar doping or film depositiontechniques. The formed p-n junction will form a p-n junction region 303.An arc layer 311, or antireflective coating, can be formed on thelight-receiving surface 329 using a physical vapor deposition (PVD) orCVD technique. In one case, an aperture 312 is formed in the arc layer311 so that a metal line can directly contact the n-type region 302. Theapertures 312, as shown may formed in the arc layer 311 formed using aconventional lithography and wet or dry etching semiconductor processingtechniques or by use of conventional laser drilling processes.

In the next step, step 204, as shown in FIG. 3C, a seed layer 321 isformed over desired regions of the substrate surface using aconventional selective deposition process, such as an electroless orselective CVD deposition process. An example of electroless depositionprocess that may be used to grow a seed layer 321 on a doped siliconregion is further described in the U.S. patent application Ser. No.11/385,047 [APPM 9916.02], filed Mar. 20, 2006, U.S. patent applicationSer. No. 11/385,043 [APPM 9916.04], filed Mar. 20, 2006, and U.S. patentapplication Ser. No. 11/385,041 [APPM 10659], filed Mar. 20, 2006, whichare all incorporated by reference in their entirety. In anotherembodiment, the seed layer 321 may be selectively formed by use of aninkjet, rubber stamping, or any technique for the pattern wisedeposition (i.e., printing) of a metal containing liquid or colloidalmedia on the surface of the substrate. After depositing the metalcontaining liquid or colloidal media on the surface of the substrate itis generally desirable to subsequently perform a thermal post treatmentto remove any solvent and promote adhesion of the metal to the substratesurface. An example of pattern wise deposition process that may be usedto form a seed layer 321 on a region of a substrate is further describedin the U.S. patent application Ser. No. 11/530,003 [APPM 10254], filedSep. 7, 2006, which is incorporated by reference in its entirety.

In one embodiment, as shown in FIGS. 3B and 3C, the seed layer 321 isformed from a blanket seed layer 321A (FIG. 3B), that is deposited overthe complete surface of the substrate and then selective regions areremoved using conventional masking and etching techniques to form theseed layer 321 (FIG. 3C) that has a desired pattern on the surface ofthe substrate. In general, a blanket seed layer 321A may be depositedusing a physical vapor deposition (PVD), chemical vapor deposition(CVD), molecular beam epitaxy (MBE), or atomic layer deposition (ALD)process.

In general, the seed layer 321 may contain a pure metal, metal alloy orother conductive material. In one embodiment, the seed layer 321contains one or more metals selected from the group consisting of nickel(Ni), cobalt (Co), titanium (Ti), tantalum (Ta), rhenium (Rh),molybdenum (Mo), tungsten (W), and ruthenium (Ru). It is desirable toselect a deposition process and a metal that forms a good electricalcontact, or ohmic contact, between the doped silicon region (e.g.,n-type region 302) and the deposited seed layer 321. In one aspect, theseed layer 321 is selected so that it acts as a barrier to the diffusionof a metal in the subsequently formed conductor 325 during subsequentprocessing steps. For example, the seed layer 321 may contain one ormore metals or metal alloys selected from the group consisting of nickel(Ni), cobalt (Co), titanium (Ti), their silicides, titanium tungsten(TiW), titanium nitride (TiN), tantalum (Ta), tantalum nitride (TaN),molybdenum (Mo), tungsten (W), tungsten silicide (WSi), molybdenumsilicide (MoSi), and ruthenium (Ru). In one embodiment, the thickness ofthe seed layer 321 may be between about 0.1 micrometers (μm) and about 1μm.

In one embodiment, the seed layer 321 consists of at least two layers ofmetal that are used to promote adhesion to the surface of the substrate,act as a diffusion barrier, and/or promote the growth of a subsequentlydeposited metal layer 322 contained within the conductor 325 (FIG. 3D).In one example, the seed layer 321 contains a first metal layer that isdeposited on the substrate surface(s) and a second metal layer thatcontains copper. In this configuration the second layer is depositedover the first metal layer so that it can act as a seed on which anelectrochemically deposited layer can be formed. In this case the firstlayer may contain one or more metals or metal alloys selected from thegroup consisting of nickel (Ni), cobalt (Co), titanium (Ti), titaniumnitride (TiN), titanium tungsten (TiW), tantalum (Ta), tantalum nitride(TaN), molybdenum (Mo), tungsten (W), and ruthenium (Ru) that isdeposited using an electroless deposition process, a conventionalphysical vapor deposition (PVD) process or a conventional chemical vapordeposition (CVD) process, and a second copper containing layer may be asubstantially pure layer or an alloy that contains one or more metalsselected from the group consisting of cobalt (Co), tin (Sn), silver(Ag), gold (Au), aluminum (Al), and nickel (Ni). In one embodiment, thesecond layer may be deposited using an electroless deposition process, aconventional physical vapor deposition (PVD) process or a conventionalchemical vapor deposition (CVD) process.

Metal Fill/Metal Layer Formation Process(es)

Referring to FIGS. 2, 3D and 4A, in step 206 the conductor 325 elementsare electrochemically deposited over desired regions of the seed layer321 using a masking plate 410 that contains apertures 413 thatpreferentially allow the electrochemically deposited material to formtherein. In this process step, the seed layer 321 is cathodically biasedrelative to an electrode 220 using a power supply 250, which causes theions in an electrolyte to form a metal layer 322 on the exposed areas ofthe seed layer 321 created within the apertures 413. In one embodiment,the light-receiving side of the solar cell may have a metal patternsimilar to the pattern shown in FIG. 1D, which is discussed above.

FIGS. 4A-4D are cross-sectional views that illustrate variousembodiments of a single substrate type electrochemical plating cell 400that may be used to electrochemically deposit a metal layer on the seedlayer 321 during step 206. While FIGS. 4A-4D illustrate the substrate ina face-down configuration (e.g., seed layer 321 is facing down) thisconfiguration is not intended to be limiting as to the scope of theinvention, since the electrochemical plating cell 400 can be in anydesirable orientation, such as face-up, vertically oriented or orientedat some desired angle relative to the horizontal without varying fromthe scope of the invention.

Generally, the electrochemical plating cell 400 generally contains ahead assembly 405, an electrode 420, a power supply 450 and a platingcell 430. The head assembly 405 may contain a thrust plate 414 and amasking plate 410 that is adapted to hold a metallized substrate 320 ina position relative to the electrode 420 during the electrochemicaldeposition. In one aspect, an actuator 415 is used to urge the thrustplate 414 and metallized substrate 320 against electrical contacts 412so that an electrical connection can be formed between a seed layer 321formed on the surface of the metallized substrate 320 and the powersupply 450 through the lead 451. It should be noted that in someembodiments of the invention, a masking plate 410 need not used. In thiscase, a masking material can be used to allow a metal to be selectivelyformed on desired regions of the substrate surface. A typical maskingmaterial may be a photoresist material that is patterned by conventionaltechniques.

In one embodiment, as shown in FIG. 4A, the electrical contacts 412 areformed on a surface of the masking plate 410. In another embodiment, theelectrical contacts 412 may be formed from separate and discreteconductive contacts (not shown), such as conventional conductive clipsor conductive pins, that are nested within a recess formed in themasking plate 410 when the metallized substrate is being urged againstthe masking plate 410. The electrical contacts (e.g., contacts 412) maybe formed from a metal, such as platinum, gold, or nickel, or anotherconductive material, such as graphite, copper Cu, phosphorous dopedcopper (CuP), and platinum coated titanium (Pt/Ti). The masking plate410 is generally made of a dielectric material that has a plurality ofapertures 413 formed therein that allow the electrolyte “A” to contactexposed regions on the substrate surface (e.g., exposed region 404).This configuration thus allows the preferential formation of anelectrochemically deposited metal layer in the exposed regions 404 onthe processing surface of the substrate when a cathodic bias of asufficient magnitude is applied to the seed layer 321. In oneembodiment, the masking plate 410 is made of glass, a plastic material,and/or a ceramic material that contains a plurality of apertures 413that are formed in the masking plate 410 using conventional machiningoperations, such as laser cutting, milling, water-jet cutting, drilling,electro-discharge machining (EDM), wet etch, plasma etch, or stampingprocesses. In one embodiment, the masking plate 410 may be formed fromSiO₂, polyimide, quartz, or other ceramic, plastic, glass, or polymericmaterial, for example. In one embodiment, the surface of the maskingplate 410 that is in contact with the processing surface of thesubstrate contains a compliant material that is adapted to compensatefor surface topography on the substrate surface and/or more activelyprevent plating of on these covered surfaces. Complaint materials mayinclude polymeric materials (e.g., rubber materials) and polymericmaterials that will not be chemically attacked by the electrolyte. Thecompliant materials may be soft enough to take-up variations in thetopography of the substrate surface.

The plating cell 430 generally contains a cell body 431 and an electrode420. The cell body 431 comprises a plating region 435 and an electrolytecollection region 436 that contains an electrolyte (e.g., item “A”) thatis used to electrochemically deposit the metal layer on the substratesurface. In one aspect, the electrode 420 is positioned in the lowerportion of the plating region 435 and rests on, or is supported by, thefeatures 434 formed in the cell body 431. In general, it is desirable toincrease the surface area of the anode so that high current densitiescan applied to the electrode 420 relative to the seed layer 321 toincrease the plating rate. It is believed that reducing the currentdensity by increasing the surface area of the anode is useful to reducemetal particle formation in the electrolyte that are often created whenplating at high current densities using a consumable electrode. Themetal particles are likely formed due to the high concentration of themetal ions near the anode surface during the high current densityplating process. The reduction of particles will reduce the number ofplating defects found in the formed electroplated layer, thus reducingthe substrate scrap and improving the CoO of the electrochemicaldeposition process. In one embodiment, as shown in FIGS. 4A-4D, theelectrode 420 is formed in a high-aspect-ratio configuration, whichmaximizes the surface of the electrode 420 to reduce the current densityduring the deposition process. In this configuration, the electrode 420may be formed in spiral shape to maximize the surface area of electrode420. The electrode 420 may have a plurality of holes, slots, or otherfeatures (e.g., item #421) that allow fluid to pass therethrough andincrease the surface area of the electrode. In one aspect, the surfacearea of the electrode 420 is greater than about 2 to 10 times of thesurface area of the cathode, or area of the metal is plated on thesubstrate surface. However, a spiral shape is not intended to belimiting as to the scope of the invention, since any high surface areashape could be used herein, for example a wire mesh structure. Theelectrode 420 can be formed so that it has a desired shape, such assquare, rectangular, circular or oval. The electrode 420 may be formedfrom material that is consumable (e.g., copper) during theelectroplating reaction, but is more preferably formed from anon-consumable material. A non-consumable electrode may be made of aconductive material that is not etched during the formation the metallayer 332, such as titanium coated copper, platinum coated copper,platinum coated titanium, or ruthenium coated titanium. In anotherembodiment, the plating apparatus, chamber and plating cell may alsoutilize a conveyor type design that continuously plate a number ofsubstrates at one time, for example, between 25 and 1000 substrates. Thesubstrates in any of the processes described herein may be oriented in ahorizontal, vertical or angled orientation relative to the horizontalduring step 206.

In an effort to achieve high plating rates and achieve desirable platedfilm properties, it is often desirable to increase the concentrationmetal ions near the cathode (e.g., seed layer 321 surface) by reducingthe diffusion boundary layer or by increasing the metal ionconcentration in electrolyte bath. It should be noted that the diffusionboundary layer is strongly related to the hydrodynamic boundary layer.If the metal ion concentration is too low and/or the diffusion boundarylayer is too large at a desired plating rate the limiting current(i_(L)) will be reached. The diffusion limited plating process createdwhen the limiting current is reached, prevents the increase in platingrate by the application of more power (e.g., voltage) to the cathode(e.g., metallized substrate surface). When the limiting current isreached a poor quality low density film is produced due to the dendritictype film growth that occurs due to the mass transport limited process.In general the hydrodynamic and diffusion boundary layers can beimproved from a static flow case by directing a flow of the electrolyteto the metallized substrate surface during plating. In operation it isthus desirable to pump an electrolyte “A” from the electrolytecollection region 436 and then past the apertures 413 formed in themasking plate 410 to improve the diffusion boundary layer.

Referring to FIG. 4A, the pump 440 may be adapted to deliver theelectrolyte from the collection region 436 across the electrode 420 andexposed region 404 and then over a weir 432 separating the platingregion 435 and then back into the electrolyte collection region 436.Referring to FIG. 4D, in one embodiment, the pump 440 is adapted todeliver the electrolyte in a tangential path across the metallizedsubstrate 320 from a nozzle 437. In this configuration the pump 440 isadapted to move the electrolyte from the collection region 436 and thenacross the exposed region 404 and then over a weir 432 separating theplating region 435 and then back into the electrolyte collection region436. The fluid motion created by the pump 440 in either configurationallows the replenishment of the electrolyte components at the exposedregion 404 that is exposed at one end of the apertures 413. In oneembodiment, to reduce the diffusion boundary layer it is desirable torotate and/or move the metallized substrate 320 and head assembly 405relative to the electrode 420 during step 206 by use of the actuator415.

Moreover, it may be further desirable to reduce the diffusion boundarylayer and hydrodynamic boundary layer at the metallized substratesurface (cathode) by use of a mechanical actuator or other similardevice. In one embodiment, the electrochemical plating cell 400 alsocontains a diffusion plate 481 that is adapted to agitate the fluid nearthe metallized substrate surface. In one embodiment, the diffusion plate481 is adapted to be move during the plating process by use of couplingshaft 483 and an actuator 482. The moving diffusion plate 481 impartsmotion to the electrolyte near the metallized substrate surface, whichwill reduce the diffusion boundary layer. In one aspect, the diffusionplate 481 contains a plurality protrusions 485 (e.g., bumps, vanes) onthe surface of the diffusion plate 481 to improve the fluid motionacross the metallized substrate surface as the diffusion plate 481 isrotated. In cases where the diffusion plate 481 is rotated it may bedesirable to use a circular shaped diffusion plate 481 (FIG. 4C) ratherthan the rectangular shape shown in FIG. 4B. In one embodiment, theactuator 482 is adapted to impart a vibrational motion to the diffuserplate 481 to help improve the diffusion boundary layer at the surface ofthe metallized substrate. The diffusion plate 481 may have a pluralityof holes 484 or pores that can be used to control and direct the flow ofelectrolyte towards the metallized substrate surface. In one embodiment,the diffusion plate 481 is formed from a porous plastic or porousceramic material.

In one embodiment, the fluid motion is achieved by the delivery of theelectrolyte through a plurality of fluid jets that are oriented towardsthe metallized substrate surface, such as two or more of the nozzles(e.g., nozzle 437 in FIG. 4D; only a single nozzle 437 is shown). Inanother embodiment, fluid motion is provided by the use of gas jets thatdeliver a gas into the solution that creates fluid movement due to thevertical motion of the injected gas bubbles due to the buoyancy of thegas in the electrolyte.

Referring to FIG. 4D, in one embodiment, a dosing system 460 may be usedin conjunction with the system controller 251 to control theconcentration of the various chemicals found in the electrolyte overtime. The dosing system 460 generally includes one or more fluiddelivery sources (e.g., reference numerals 461, 462), a chemicalanalysis system 465 and a waste delivery system 464. The waste deliverysystem 464 is adapted to remove a portion of the electrolyte from theplating cell 430 and deliver it to a waste collection system 463. Thefluid sources 461, 462 are generally configured to deliver one or moreof the chemicals to the electrolyte in the plating cell 430. In oneembodiment, the fluid source 461 is adapted to deliver a powder (e.g.,copper oxide powder) or metal ion containing solution (e.g., coppersulfate) to the electrolyte to replenish the metal ion concentrationplated out during step 206 or step 208 when an inert anode is used. Inone embodiment, the fluid sources 461, 462 are adapted to deliver one ormore of the chemicals found in the electrolyte that are discussed inconjunction with steps 206 or 208. The chemical analysis system 465 maybe an organic (e.g., Raman spectroscopy, CVS) and/or an inorganicchemical analyzer that are used to measure the properties andconcentrations of the chemicals in the electrolyte solution at a desiredtime. Therefore, by use of the system controller 251, the fluid sources461, 462, the waste delivery system 464, and the chemical analyzer 465,which can feed back the measured results to the system controller 251,the chemical concentrations in the electrolyte can be controlled as afunction of time. In some example, the dosing system 460 may be used toperform a conventional “feed and bleed” type chemicals replenishmentsystem.

Referring to FIGS. 4A and 4D, in one embodiment, an auxiliary electrode454 is placed in a desirable position within the plating cell 430 toshape the electric field during the plating process and thus optimizethe deposition uniformity of the deposited metal layer 322. At highplating rates the electric field, which is created between the biasedseed layer 321 relative to the electrode 420, may have significantnon-uniformities due to the non-optimal geometric and fluid dynamiccharacteristics of the plating cell that can be compensated for by useof the auxiliary electrode 454. In one embodiment, as shown in FIGS. 4Aand 4D, an auxiliary electrode 454 is positioned within plating region435 below the diffuser plate 481. In another embodiment, the auxiliaryelectrode 454 is disposed within the electrolyte collection region 436and thus is in electrical communication with the plating region 435through the electrolyte flowing over the weir 432. In some cases it maybe desirable to place the auxiliary electrode 454 above the diffuserplate 481 and closer to the substrate surface. The auxiliary electrode454 can be separately biased using a second power supply 453 that iscontrolled by the system controller 251. An example of an exemplaryauxiliary electrode design is further described in the commonly assignedU.S. patent application Ser. No. 11/362,432, filed Feb. 24, 2006, whichis herein incorporated by reference.

FIG. 4B illustrates an exploded isometric view of the head assembly 405,metallized substrate 320, diffusion plate 481 and electrode 420 portionof the electrochemical plating cell 400. While the metallized substrate320 and plating cell 430 components illustrated in FIG. 4B have a squareshape, this configuration is not intended to limiting to scope of theinvention. When in use the metallized substrate 320 is placed in contactwith the masking plate 410 so that features 426 (FIG. 5A) can be formedon the exposed regions of the patterned features 425 of the seed layer321 through the apertures (e.g., apertures 413A, 413B) formed in themasking plate 410. The patterned features 425 are metallized regions ofthe seed layer 321 that have been deposited or formed in a desiredpattern on the surface 429 of the metallized substrate 320. It should benoted that the apertures 413 formed in the masking plate 410 may beformed in any desirable shape and/or pattern. In one embodiment, theapertures 413 formed in the masking plate 410 may be a rectangular or acircular feature that is between about 100 μm and about 240 μm in size.In another embodiment, the apertures formed in the masking plate 410 maybe a pattern features, for example grid lines or interdigitated gridlines that are between about 100 μm and about 240 μm wide and have alength that extends across the substrate surface, such as between about100 μm and the length of the substrate in length. In one embodiment, thetotal exposed area on the surface of the substrate, which is the sum ofall of the cross-sectional areas of all of the apertures 413 at thecontacting surface 418 of the masking plate 410, is between about 0.5%and about 100% of the surface area of the surface of the substrate thatis in contact with the masking plate 410. In one embodiment, the totalexposed area of the apertures that are in contact with thenon-light-receiving surface, or backside, of the substrate is greaterthan about 70% of the surface area of the non-light-receiving surface ofthe substrate. In one embodiment, the total exposed area of theapertures that are in contact with the light-receiving surface of thesubstrate is less than about 30% of the surface area of thelight-receiving surface of the substrate. Preferably, the total exposedarea of the apertures that are in contact with the light-receivingsurface of the substrate is less than about 10%. In general, the maskingplate 410 must be thicker than the maximum electrochemical depositionthickness to allow the masking plate to be separated from the substrateafter the deposition process has been performed. Typically, the maskingplate may be between about 100 μm and about 1 cm thick.

FIG. 4C is an exploded isometric view of the head assembly 405,metallized substrate 320, diffusion plate 481 and electrode 420 portionof the electrochemical plating cell 400 according to another embodimentof the invention. FIG. 4C is similar to FIG. 4B except that themetallized substrate 320 and plating cell 430 components have a circularshape. This configuration may be useful where the metallized substrate320 has a circular shape and/or it is desirable to rotate one or more ofthe components, such as the head assembly 405, metallized substrate 320,diffusion plate 481 and/or electrode 420.

FIGS. 5A and 5D are isometric views of a square and a circularmetallized substrate 320 that contains a plurality of features 426formed on certain regions of the patterned features 425 after step 206has been performed. Referring to FIGS. 5 and 6A, in one example a groupof circular apertures 413A and slot shaped apertures 413B formed in themasking plate 410 are aligned to the patterned features 425 of the seedlayer 321 so that features 426 having a desirable shape and thickness“t” (FIGS. 5A and 5D) can be preferentially formed thereon. The features426 are formed by cathodically biasing the patterned features 425 usingthe power supply 450 and the contact(s) 452 so that the metal layer 322can be grown to a desired thickness. The thickness “t” of the features426 that form the conductor 325 may be between about 20 μm and about 40μm on the non-light-receiving side of the substrate and between about 1μm to about 5 μm on the light-receiving surface of the substrate, whichis hard to accomplish using conventional electroless, PVD and CVDtechniques at an acceptable substrate throughput and/or desirabledeposition thickness uniformity. Further, for high power solar cellapplications the conductor 325 thickness on the non-light-receiving sideof the substrate may be between about 40 and about 70 μm, and on thelight receiving side of the substrate the thickness may be between about1 and about 20 μm thick.

FIGS. 5B and 5E are isometric views of a square and a circularmetallized substrate 320 that contains a plurality of features 426formed on a blanket seed layer 321A formed after performing step 206 ofthe method steps 200. In this case, a group of features 426 formed onselected areas of the blanket film 321A that have a shape defined by theapertures (e.g., apertures 413A, 413B) and a thickness “t” set by thedeposition rate and deposition time of electrochemical depositionprocess performed in step 206. The features 426 may be formed ondesirable regions of the blanket film 321A by aligning the masking plate410 to the metallized substrate 320.

FIGS. 5C and 5F are isometric views of a metallized substrate 320 thatcontains only the plurality of features 426 formed on the surface 429 ofthe metallized substrate 320 after an optional metal layer removal stepis performed. The optional metal layer removal step generally entailsperforming a conventional wet or dry etching step to remove any unwantedand/or excess metal on the surface 429 of the substrate, such as unusedportions of the blanket seed layer 321A (FIG. 5B or 5E) or unusedportions of the patterned features 425 (FIG. 5A or 5D). Conventional wetetching steps may use an acid or basic solution that is adapted toremove the unwanted and/or excess metal on the surface 429.

The system controller 251 is adapted to control the various componentsused to complete the electrochemical process performed in theelectrochemical plating cell 400. The system controller 251 is generallydesigned to facilitate the control and automation of the overall processchamber and typically includes a central processing unit (CPU) (notshown), memory (not shown), and support circuits (or I/O) (not shown).The CPU may be one of any form of computer processors that are used inindustrial settings for controlling various system functions, chamberprocesses and support hardware (e.g., detectors, robots, motors, gassources hardware, etc.) and monitor the electrochemical plating cellprocesses (e.g., electrolyte temperature, power supply variables,chamber process time, I/O signals, etc.). The memory is connected to theCPU, and may be one or more of a readily available memory, such asrandom access memory (RAM), read only memory (ROM), floppy disk, harddisk, or any other form of digital storage, local or remote. Softwareinstructions and data can be coded and stored within the memory forinstructing the CPU. The support circuits are also connected to the CPUfor supporting the processor in a conventional manner. The supportcircuits may include cache, power supplies, clock circuits, input/outputcircuitry, subsystems, and the like. A program (or computerinstructions) readable by the system controller 251 determines whichtasks are performable on a substrate. Preferably, the program issoftware readable by the system controller 251 that includes code toperform tasks relating to monitoring and execution of theelectrochemical process recipe tasks and various chamber process recipesteps.

In one embodiment of step 206, one or more direct current (DC) and/orpulse plating waveforms are delivered to the seed layer 321 during theelectrochemical deposition process to form the metal layer 322 that hasdesirable electrical and mechanical properties. The applied bias mayhave a waveform that is DC and/or a series of pulses that may have avarying height, shape and duration to form the conductor 325. In oneembodiment, a first waveform is applied to the seed layer 321 by use ofa power supply 250 to cause some electrochemical activity at the surfaceof the seed layer. In this case, while the bias applied to the seedlayer need not always be cathodic, the time average of the energydelivered by the application of the first waveform is cathodic and thuswill deposit a metal on the surface of the seed layer 321. In anotherembodiment, it may be desirable to have a time average that is anodic(i.e., dissolution of material) to clean the surface of the seed layerprior to performing the subsequent filling process steps. Theconcentration gradients of metal ions, additives or suppressors in theelectrolyte “A” (FIGS. 4A and 4D) in the proximity of the conductor 325are affected by the polarity, sequencing, and durations of biasdelivered to the surface of the substrate. For example, it is believedthat the duration of a deposition pulse during a pulse plating typeprocess controls the deposition on the sidewall of the feature, whilethe dissolution pulse creates additional metal ions and thus, aconcentration gradient of these ions, around the feature. An example ofa pulse plating process that may be used to form a metal feature on thesubstrate surface is further described in the co-pending U.S. patentapplication Ser. No. 11/552,497 [APPM 11227], filed Oct. 24, 2006 andentitled “Pulse Plating of a Low Stress Film on A Solar Cell Substrate”,which is herein incorporated by reference in its entirety. However, itis desirable to reduce or eliminate the use of anodic pulses in aneffort to increase the deposition rate and thus substrate throughputthrough the plating cell and CoO of the system.

In an effort to improve metallized substrate throughput in theelectrochemical plating cell 400 by increasing the deposition rate ofone or more of the electrochemically deposited layers (e.g., metal layer322, interfacial layer 323 (discussed below)) it is desirable to adjustand control the temperature of the electrolyte during the depositionprocess. In one embodiment, the temperature of the electrolyte iscontrolled within a range of about 18° C. and about 85° C., andpreferably between about 30° C. and about 70° C. to maximize the platingrate. It should be noted that evaporation losses becomes an larger issueas the temperature of the electrolyte is increased, since if notmonitored and controlled will cause precipitation of one or morecomponents in the electrolyte bath, which can generate particles andaffect the deposited film quality and composition. FIG. 6 illustrates agraph of the effect of temperature on maximum current density for twodifferent electrolyte chemistries described in Example 1 and Example 2,shown below. In this example it is desirable to run the copperfluoroborate (Cu(BF₄)₂) bath a temperatures greater than about 30° C. toimprove the deposition rate by about 3 to 7 times from a typicalelectrolyte bath that is run at a temperature around room temperature.

Electrolyte Solution

In general, it is desirable to form a conductor 325 that is defect free,has a low stress that can be rapidly deposited on the substrate surface.The electrochemical process performed in the electrochemical platingcell 400 utilizes an electrolyte solution containing a metal ion sourceand an acid solution. In some cases one or more additives, such as anaccelerator, a suppressor, a leveler, a surfactant, a brightener, orcombinations thereof may be added to the electrolyte solution to helpcontrol the stress, grain size and uniformity of the electrochemicallydeposited metal layer(s). However, additives generally make the controlof the electrochemical process more complex and make the cost of theconsumables generated during the electrochemical plating process toincrease, since they are generally consumed or breakdown during theelectrochemical process. In one embodiment, to increase theplanarization power, the electrolyte can optionally contain an inorganicacid, (e.g., sulfuric acid, phosphoric acid or pyrophosphoric acid),various inorganic supporting salts, and other additives that may be usedto improve the quality of plated surfaces (e.g., oxidizers, surfactants,brighteners, etc.). In general it is desirable to increase the metal ionconcentration in the electrolyte to improve the electrochemicalcharacteristics of the plating bath, such as improving the diffusionboundary layer and limiting current characteristics of the cell whenhigh plating rates are used to electrochemically deposited a metallayer.

In one example, the metal ion source within the electrolyte solutionused in step 206 in FIG. 2 is a copper ion source. In one embodiment,the concentration of copper ions in the electrolyte may range from about0.1 M to about 1.1M, preferably from about 0.4 M to about 0.9 M. Usefulcopper sources include copper sulfate (CuSO₄), copper chloride (CuCl₂),copper acetate (Cu(CO₂CH₃)₂), copper pyrophosphate (Cu₂P₂O₇), copperfluoroborate (Cu(BF₄)₂), derivatives thereof, hydrates thereof orcombinations thereof. The electrolyte composition can also be based onthe alkaline copper plating baths (e.g., cyanide, glycerin, ammonia,etc) as well.

Example 1

In one example, the electrolyte is an aqueous solution that containsbetween about 200 and 250 g/l of copper sulfate pentahydrate(CuSO₄.5(H₂O)), between about 40 and about 70 g/l of sulfuric acid(H₂SO₄), and about 0.04 g/l of hydrochloric acid (HCl). In some cases itis desirable to add a low cost pH adjusting agent, such as potassiumhydroxide (KOH) or sodium hydroxide (NaOH) to form an inexpensiveelectrolyte that has a desirable pH to reduce the cost of ownershiprequired to form a metal contact structure for a solar cell. In somecases it is desirable to use tetramethylammonium hydroxide (TMAH) toadjust the pH. Could go to high copper concentration with organiccomplexing agent to solution, such as MSA. In one aspect, a low acidchemistry is used to complete the high speed deposition process. Anexample of some exemplary copper plating chemistries that may be usedfor high speed plating is further described in commonly assigned U.S.Pat. Nos. 6,113,771, 6,610,191, 6,350,366, 6,436,267, and 6,544,399,which are all incorporated by reference in their entirety.

Example 2

In another example, the electrolyte is an aqueous solution that containsbetween about 220 and 250 g/l of copper fluoroborate (Cu(BF₄)₂), betweenabout 2 and about 15 g/l of tetrafluoroboric acid (HBF₄), and about 15and about 16 g/l of boric acid (H₃BO₃). In some cases it is desirable toadd a pH adjusting agent, such as potassium hydroxide (KOH), or sodiumhydroxide (NaOH) to form an inexpensive electrolyte that has a desirablepH to reduce the cost of ownership required to form a metal contactstructure for a solar cell. In some cases it is desirable to usetetramethylammonium hydroxide (TMAH) to adjust the pH.

Example 3

In yet another example, the electrolyte is an aqueous solution thatcontains between about 60 and about 90 g/l of copper sulfatepentahydrate (CuSO₄.5(H₂O)), between about 300 and about 330 g/l ofpotassium pyrophosphate (K₄P₂O₇), and about 10 to about 35 g/l of5-sulfosalicylic acid dehydrate sodium salt (C₇H₅O₆SNa.2H₂O). In somecases it is desirable to add a pH adjusting agent, such as potassiumhydroxide (KOH), or sodium hydroxide (NaOH) to form an inexpensiveelectrolyte that has a desirable pH to reduce the cost of ownershiprequired to form a metal contact structure for a solar cell. In somecases it is desirable to use tetramethylammonium hydroxide (TMAH) toadjust the pH.

Example 4

In yet another example, the electrolyte is an aqueous solution thatcontains between about 30 and about 50 g/l of copper sulfatepentahydrate (CuSO₄.5(H₂O)), and between about 120 and about 180 g/l ofsodium pyrophosphate decahydrate (Na₄P₂O₇.10(H₂O)). In some cases it isdesirable to add a pH adjusting agent, such as potassium hydroxide(KOH), or sodium hydroxide (NaOH) to form an inexpensive electrolytethat has a desirable pH to reduce the cost of ownership required to forma metal contact structure for a solar cell. In some cases it isdesirable to use tetramethylammonium hydroxide (TMAH) to adjust the pH.

In one embodiment, it may be desirable to add a second metal ion to theprimary metal ion containing electrolyte bath (e.g., copper ioncontaining bath) that will plate out or be incorporated in the growingelectrochemically deposited layer or on the grain boundaries of theelectrochemically deposited layer. The formation of a metal layer thatcontains a percentage of a second element can be useful to reduce theintrinsic stress of the formed layer and/or improve its electrical andelectromigration properties. In one example, it is desirable to add anamount of a silver (Ag), nickel (Ni), zinc (Zn), or tin (Sn) metal ionsource to a copper plating bath to form a copper alloy that has betweenabout 1% and about 4% of the second metal in the deposited layer.

In one example, the metal ion source within the electrolyte solutionused in step 206 in FIG. 2 is a silver, tin, zinc or nickel ion source.In one embodiment, the concentration of silver, tin, zinc or nickel ionsin the electrolyte may range from about 0.1 M to about 0.4M. Usefulnickel sources include nickel sulfate, nickel chloride, nickel acetate,nickel phosphate, derivatives thereof, hydrates thereof or combinationsthereof.

Contact Interface Layer in a Single Substrate Electrochemical PlatingCell

Referring to FIGS. 2 and 3E, in step 208 an optional contact interfacelayer 323 is deposited over the surface of the metal layer 322 formedduring step 206. The contact interface layer 323 can be formed using anelectrochemical deposition process, an electroless deposition process, aCVD deposition process, or other comparable deposition processes to forma good ohmic contact between the formed conductors 325 and an externalinterconnection bus (not shown) that is adapted to connect one or moresolar cells together. In one embodiment, the contact interface layer 323is formed from a metal that is different from the metal contained in themetal layer 322. In this configuration the contact interface layer 323may be formed from a pure metal or metal alloy that contains metals,such as tin (Sn), silver (Ag), gold (Au), copper (Cu) or lead (Pb). Inone embodiment, the thickness of the contact interface layer 323 may bebetween about 3 μm and about 7 μm. Forming a contact interface layer 323having a thickness greater than 3 μm is generally hard to accomplishusing conventional electroless, PVD and CVD techniques at an acceptablesubstrate throughput and/or desirable deposition thickness uniformity.

In one embodiment, the contact interface layer 323 is formed by use ofan electrochemical process. In some cases it is desirable to performstep 208 in the same electrochemical plating cell as step 206 wasperformed. In this configuration, the seed layer 321 and metal layer 322are cathodically biased relative to an electrode (e.g., electrode 420 inFIG. 4A) using a power supply that causes the ions in an contactinterface layer electrolyte, which is brought into contact with the seedlayer 321, metal layer 322 and the electrode, to plate the contactinterface layer 323 on the surface of the seed layer 321 and/or metallayer 322. In the case where the contact interface layer 323 is formedin the same electrochemical plating cell 400 as the metal layer 322 andthe contact interface layer 323 contains one or more different elementsthan the metal layer 322 the electrolyte used to form the metal layerwill need to be discarded and replaced with the new contact interfacelayer electrolyte to form the contact interface layer 323.

Contact Interface Layer Electrolyte Solution

In one embodiment, the contact interface layer 323 contains tin (Sn) andis deposited by use of an electrochemical deposition process. Theconcentration of tin ions in the contact interface layer electrolyte mayrange from about 0.1 M to about 1.1M. Useful tin sources include tinsulfate (SnSO₄), tin chloride (SnCl₂), and tin fluoroborate (Sn(BF₄)₂),derivatives thereof, hydrates thereof or combinations thereof. Inanother embodiment, to increase the planarization power, the electrolytecan optionally contain an inorganic acid, (e.g., sulfuric acid,phosphoric acid or pyrophosphoric acid), various inorganic supportingsalts, and other additives that may be used to improve the quality ofplated surfaces (e.g., oxidizers, surfactants, brighteners, etc.). Theelectrolyte composition can also be based on the alkaline tin platingbaths (e.g., glycerin, ammonia, etc) as well. The electrolyte may alsocontain methane-sulfonic acid (MSA).

In one example, the electrolyte is an aqueous solution that containsbetween about 200 and 250 g/l of tin sulfate pentahydrate(SnSO₄.5(H₂O)), between about 40 and 70 g/l of sulfuric acid (H₂SO₄),and about 0.04 g/l of hydrochloric acid (HCl). In some cases it isdesirable to add one or more organic additives (e.g., levelers,accelerators, suppressors) to promote uniform growth of the depositedlayer. In some cases it is desirable to add a low cost pH adjustingagent, such as potassium hydroxide (KOH) or sodium hydroxide (NaOH) toform an inexpensive electrolyte that has a desirable pH to reduce thecost of ownership required to form a metal contact structure for a solarcell. In some cases it is desirable to use tetramethylammonium hydroxide(TMAH) to adjust the pH.

Multiple Metallization Steps

The embodiments discussed above in conjunction with FIGS. 2-5 can beused to form one or more of the conductors 325 on a surface of thesubstrate. While it is generally desirable to form all of the variouscontact structures used to form a solar cell device at one time, this issometimes not possible due to various processing constraints. In somecases two metallization processes are required, for example, to form afront side contact, as shown in FIGS. 3A-3E, and a second metallizationprocess to form a second contact on a different region of the metallizedsubstrate 320, such as a backside contact 330 shown in FIG. 3E.

As shown in FIG. 3F, the second metallization step can be used to formthe backside contact 330 that is adapted to connect to an active region(e.g., p-type region in FIG. 3A) of the solar cell device. In thisexample, seed layer 331 can be formed using the process steps describedabove in conjunction with step 204 or other similar techniques. Next, ametal layer 332 and an interconnect layer 333 may be formed using theprocess steps described above in conjunction with steps 206-208 andFIGS. 2, 3D-3E and 4. Preferably, the total exposed area of theapertures 413 in the masking plate 410 (FIGS. 4A-4D) used to form thebackside contact on the substrate surface is between about 70% and about99% of the surface area of the backside surface of the substrate.

Batch Processing Apparatus

In an effort to further increase the substrate throughput through thesolar cell plating apparatus, groups of the metallized substrates 320may be plated at once in a batch type plating operation. FIG. 7Aillustrates is a side cross-sectional view of a batch plating apparatus701 that contains three plating cells 710 that are each adapted to plateone or more metal layers on a metallized substrate surface using theprocess steps described above (e.g., steps 206-208). While FIG. 7Aillustrates a batch plating apparatus 701 that contains threehorizontally oriented plating cells 710, this configuration is notintended to be limiting as to the number plating cells that may be usedto perform a batch type plating process or the angular orientation ofthe plating cells relative to each other or to the horizontal. In oneaspect, two or more plating cells may be used to perform a batch platingprocess where two or more substrates are plated at once. In anotheraspect, the substrates are oriented vertically in the batch platingapparatus during the plating process.

Referring to FIG. 7A, in one embodiment, the batch plating process isperformed by immersing two or more plating cells 710 in a plating tank751 and then biasing each of the metallized substrates relative to oneor more electrodes. As shown in FIG. 7A, each of the plating cells 710may contain an electrode 420, power supply (e.g., item #s 450A-450C) anda head assembly 405 that is adapted to hold and retain the metallizedsubstrate 320 during the plating process. However, in one embodiment,the plating cells 710 may each contain any of the components describedabove in conjunction with FIGS. 4A-4D. In each plating cell 710 the headassembly 405 may contain a thrust plate 414 that is used to urge themetallized substrate 320 against the electrical contacts 412 and maskingplate 410 by use of an actuator (see FIG. 4B). During operation themetallized substrates 320 are loaded into the head assemblies 405 of therespective plating cells 710 and then the plating cells 710 are immersedin the electrolyte “A” contained in the plating tank 751 so that aplating process can be performed. In one embodiment, during a batchplating process the seed layer 321 on the surface of each of themetallized substrates 320 in each of the plating cells 710 are biasedrelative to the electrode 420 contained in the respective plating cell710 using a power supply. In one aspect, as shown in FIG. 7A, eachelectrode 420 in each plating cell 710 is biased independently from eachother using a power supply, such as power supply 250A in the top mostplating cell, power supply 250B in the middle plating cell 710 and powersupply 250C in the lower plating cell 710. To improve the hydrodynamicand diffusion boundary layers the electrolyte may be delivered to theregion between the electrode 420 and the metallized substrate 320 usinga fluid delivery system 441 that contains a pump 440. In one aspect, itmay be desirable to rotate the metallized substrates and/or electrodes420 during the batch plating process using conventional techniques.While FIG. 7A illustrates the plating cells 710 in a horizontalorientation this configuration is not intended to be limiting, since theplating cells 710 could oriented vertically or at any angle relative tothe horizontal without varying from the scope of the invention.

FIG. 7B illustrates a plan view of a batch plating system 750 thatcontains an array of the batch plating apparatuses 701 illustrated inFIG. 7A. In this configuration, an array of plating cells 710 in each ofthe batch plating apparatuses 701 are immersed with an electrolyteretained in the plating tank 751 so that steps 206 or 208 can beperformed. In one embodiment, an array of plating cells 710 in each ofthe batch plating apparatuses 701 are distributed around a sprayingdevice 752 that is adapted to deliver a flow of electrolyte to a regionbetween the electrode 420 and substrate 320 contained within each of theplating cells 710. The spraying device 752 may connected to a pump (notshown) that is adapted to recirculate the electrolyte through theplating cells 710. FIG. 7I illustrates a plan view of a batch platingsystem 750 that contains an array of the batch plating apparatuses 701illustrated in FIG. 7A that are adapted to process circular typesubstrates.

FIG. 7C illustrates an isometric view of another embodiment of a batchplating system, hereafter batch plating system 760, which is adapted toplate multiple metallized substrates that are arrayed in horizontalorientation and immersed within an tank containing an electrolytesolution. In one embodiment, the head assembly 765 is adapted to retaina plurality of substrates in a desirable position relative to anelectrode 420. In this configuration each of the metallized substrates320 may be separately biased relative to the electrode 420 using one ofthe dedicated power supplies 450A-450C. In one embodiment, one or moremasking plates (not shown) may be positioned against the surface of thesubstrates retained in the head assembly 765 to allow for a preferentialdeposition of desired regions on each of the substrates. In one aspect,the electrode 420 may be formed from a plurality of electrodes that canbe separately biased relative to a metallized substrate 320. While themetallized substrates in FIG. 7C, are circular in shape thisconfiguration is not intended to limiting as to the scope of inventiondescribed herein.

In another embodiment, the plating apparatus, chamber and plating cellmay also utilize a conveyor type design that continuously plate a numberof substrates at one time, for example, between 25 and 1000 substrates.The substrates in any of the processes described herein may be orientedin a horizontal, vertical or angled orientation relative to thehorizontal during step 206.

FIGS. 7D-7F illustrate one embodiment of a batch plating chamber 780that is adapted to plate both sides of multiple metallized substrates320 that are immersed within an electrolyte tank 770. The batch platingchamber 780 may be adapted to sequentially plate each side of multiplemetallized substrates 320, or plate both sides of multiple metallizedsubstrates 320 at the same time. FIG. 7D illustrates a sidecross-sectional view of a batch plating chamber 780 that is adapted todeposit a metal layer on the surface of the metallized substrates 320using steps 206 and/or 208, discussed above. The batch plating chamber780 generally contains a head assembly 776, one or more electrodes(e.g., reference numerals 771, 772), an electrolyte tank 770, and one ormore power supplies (e.g., reference numerals 775A, 775B) that areadapted to form one or more conductors 325 on a surface of themetallized substrate 320. While FIG. 7D illustrates a batch platingchamber 780 that contains a plurality of vertically oriented metallizedsubstrates, this configuration is not intended to be limiting as to thescope of the invention. In another aspect, the substrates are orientedhorizontally in the batch plating apparatus during the plating process.

FIG. 7D illustrates an isometric view of the head assembly 776 thatcontains a plurality of cell assemblies 782 that are adapted to retainand preferentially form the conductors 325 on one or more surfaces ofthe plurality of metallized substrates 320 using an electrochemicalplating process. In one embodiment, the cell assemblies 782 contain atleast one masking plate assembly 779, an actuator 777, and a supportframe 781 that are adapted to hold and make electrical contact to aconductive layer (e.g., seed layer 321) formed on one or more sides ofthe metallized substrates 320. While the head assembly 776, illustratedin FIG. 7E, contains 20 cell assemblies 782 this configuration is notintended to be limiting to the scope of the invention, since the headassembly 766 could contain two or more cell assemblies 782 withoutvarying from the scope of the invention described herein. In oneexample, the cell assembly 782 contains between about 2 and about 1000metallized substrates at one time.

In one embodiment, the masking plate assemblies 779 may contain aplurality of masking plates 410 (FIG. 4A) that are held together by asupporting structure (not shown) that allows each of the masking plates410 to contact a surface of a metallized substrate so that apertures 413and contacts 412 (FIG. 4A) contained therein can be used topreferentially form the conductors 325 on a surface of each of themetallized substrates 320. In another embodiment, the masking plateassemblies 779 is a plate, or multiple plates, that are adapted tocontact multiple metallized substrates 320 at one time so that apertures413 formed therein can be used to preferentially form the conductors 325on the surface of each of the metallized substrates 320.

FIG. 7F illustrates a close-up partial section view of one cell assembly782 that can be used to form a metal layer on the feature 425 through anaperture 413 formed in the masking plate assembly 779. In oneembodiment, the contacts 412 (FIG. 4A) are electrically connected toportions of the support frame 781 so that a bias can be applied to eachof the contacts in each of the cell assemblies 782 relative to one ofthe one or more electrodes 771, 772 by use of a single electricalconnection to a single power supply. In another embodiment, discreteelectrical connections (not shown for clarity) provided through themasking plate assembly 779 or support frame 781 to each of one or moreof the contacts 412 in each of the cell assemblies 782 so that each ofthe one or more of the contacts 412 can be separately biased relative toone of the one or more electrodes 771, 772 by use of different powersupplies.

Referring to FIG. 7D, the electrolyte tank 770 generally contains a cellbody 783 and one or more electrodes 771, 772. The cell body 783comprises a plating region 784 and an electrolyte collection region 785that contains an electrolyte (e.g., item “A”) that is used toelectrochemically deposit the metal layer on a conductive region formedon the substrate surface. In one aspect, the electrode 771, 772 arepositioned vertically in the plating region 784 and are supported by oneor more of the walls of the cell body 783. In general, it is desirableto increase the surface area of the anode so that high current densitiescan applied to the electrodes 771, 772 relative to the conductiveregions (e.g., seed layer 321 in FIG. 4A) to increase the plating rate.An example of a high surface area electrode that may be used here isdiscussed above in conjunction with the electrode 420. The electrodes771, 772 can be formed so that they have a desired shape, such assquare, rectangular, circular or oval. The electrodes 771, 772 may beformed from material that is consumable (e.g., copper) during theelectroplating reaction, but is more preferably formed from anon-consumable material.

In operation, a metallized substrate 320 is positioned in each of thecell assemblies 782 within the head assembly 776 so that electricalcontacts (e.g., reference numerals 412 in FIGS. 4A-4D), found in eachcell assembly 782, can be placed in contact with one or more conductiveregions on the metallized substrate surface. In one embodiment, themetallized substrates 320 are positioned on the support frame 781 withineach cell assembly 782 and then are clamped to the support frame 781 byuse of the actuator 777 (e.g., air cylinder) contained in the headassembly 776 so that the masking plate assembly 779 and contacts 412 cancontact the substrate surface. In another embodiment, the metallizedsubstrates are placed between opposing masking plate assemblies 779 andthen clamped together by use of the actuator 777. After the electricalconnection between the contacts and the conductive regions has been madethe head assembly 776 is immersed into the electrolyte contained in theelectrolyte tank 770 so that a metal layer (e.g., reference numeral 322)can be formed on the conductive regions by biasing them relative to theone or more electrodes 771, 772 using one or more of the power supplies755A, 775B.

Referring to FIG. 7D, the electrolyte tank 770 may also contain a pump778 may be adapted to deliver the electrolyte from the electrolytecollection region 785 to the surface of the metallized substratescontained in the head assembly 776. In one embodiment, the pump 778 isadapted to deliver electrolyte to a gap formed between the head assembly776 and the electrodes 771, 772 and then over a weir 786 and into theelectrolyte collection region 785. The fluid motion created by the pump778 allows the replenishment of the electrolyte components at theexposed regions of the substrates positioned in the head assembly 776.In one embodiment, to reduce the diffusion boundary layer it isdesirable to move the head assembly relative to the electrodes 771, 772during the step 206 by use of an actuator 787. In one embodiment, theactuator 787 comprises an AC motor, piezoelectric device or othersimilar mechanical component that can impart motion to the head assembly776.

FIG. 7G illustrates a side cross-sectional view of a plating system 790that contains two or more batch plating cells 780 that are positionednear each other so that the substrates positioned in the moveable headassembly 776 can be sequentially plated using different electrolytes ordifferent plating parameters. In operation the head assembly 776 can besequentially positioned in each of the batch plating cells 780 so thatmetal layers can be electrochemically deposited on the substrate surfaceby applying a bias to the individual substrates retained in the headassembly 776 relative to the electrodes 771, 772 contained in the batchplating cells 780. FIG. 7G illustrates, one embodiment that containsthree batch plating cells 780A-780C that each contain differentelectrolytes, such as A₁, A₂, and A₃, respectively. The actuator 787 isa device, such as a conventional robot, gantry crane or similar devices,which can be used to lift and transfer the head assembly 776 between thevarious batch plating cells 780.

In one embodiment, during operation of the plating system 790 a headassembly 776 that contains one or more metallized substrates 320 isimmersed in the first batch plating cell 780A that contains a firstelectrolyte A₁ so that a first metal layer can be formed on the surfaceof the metallized substrates 320. The one or more metallized substrates320 contained in the head assembly 776 may be plated by biasingconductive features on the substrate surfaces relative to one or more ofthe electrodes 771A, 772A positioned in the electrolyte A₁ using one ormore of the power supplies 775A₁, 775B₁. After depositing a desiredamount of material on the surface of the substrates the head assembly776 is transferred following path B₁ to an adjacent second batch platingcell 780B so that a second metal layer can be deposited on the surfaceof the metallized substrates. The metallized substrates 320 contained inthe head assembly 776 may be plated by biasing conductive features onthe substrate surfaces relative to one or more of the electrodes 771B,772B positioned in the electrolyte A₂ using one or more of the powersupplies 775A₂, 775B₂. After depositing a second desired amount ofmaterial on the surface of the substrates the head assembly 776 istransferred following path B₂ to an adjacent third batch plating cell780C so that a third metal layer can be deposited on the metallizedsubstrate surface. The metallized substrates 320 contained in the headassembly 776 may be plated by biasing conductive features on thesubstrate surfaces relative to one or more of the electrodes 771C, 772Cpositioned in the electrolyte A₃ using one or more of the power supplies775A₃, 775B₃. In one embodiment, it may be desirable to rinse thecomponents contained within head assembly 776, including the metallizedsubstrates, with DI water between plating steps to reduce the “drag-out”contamination of the subsequent electrolytes with electrolytes used inprior processes.

FIG. 7H illustrates a side partial-sectional view of a plating system795 that contains an electrolyte tank 796 that allows the substratespositioned in a head assembly 776 to be sequentially plated bypositioning the head assembly 776 near two or more electrode assemblies797 positioned in the electrolyte tank 796. In this configuration thesubstrates contained in the head assembly 776 are positioned within asingle electrolyte “A” that is used in conjunction with a two or moreelectrode assemblies 797 to sequentially plate the substrates usingdifferent plating parameters (e.g., local electrolyte flow rate, currentdensity). In operation, the metallized substrates 320 positioned in thehead assembly 776 can be plated by positioning them near or slowlytransferring them past each of the electrode assemblies 797 that arebiased relative to the conductive features on the substrate surface. Inone aspect, one or more of the plating parameters are varied as the headassembly 776 are positioned near different electrode assemblies 797. Inone embodiment, both sides of a substrate are plated by electricallybiasing a first electrode 797A positioned on one side of the headassembly 767 and by electrically biasing a second electrode 797Bpositioned on the other side of the head assembly 767 relative to theconductive features formed on the substrate surface using one or morepower supplies (not shown) and the system controller 251. The actuator787 is a device, such as a conventional robot, gantry crane or similardevices, that can be used to transfer the head assembly 776 “in” and“out” of the electrolyte tank 796 and near the various electrodeassemblies 797. In this configuration multiple head assemblies 776 canbe inserted into the electrolyte tank 796 at one time to allow for amore seemless “assembly line” type process flow through the variousdifferent process steps that may be used to form the conductors 325 onthe surface of the substrates contained in each of the head assembly776.

Referring to FIG. 2, in one embodiment, an optional seed layer removalstep, or step 209, is performed after completing step 208. The seedlayer removal step generally entails performing a conventional wet ordry etching step to remove any unwanted and/or excess metal found on thesurface of the substrate, such as unused or un-necessary portions of theseed layer 321. Conventional wet etching steps may involve immersing thesubstrate in an acidic or basic solution that is adapted to remove theunwanted and/or excess metal on the surface of the substrate. In oneembodiment, a wet etch chemistry that preferentially etches the seedlayer 321 versus the material in the interface layer 323.

Post Processing Steps

Referring to FIG. 2, in step 210 one or more post processing steps areperformed to reduce the stress or improve the properties of thedeposited metal layers (e.g., metal layers 321, 322, 323, 331, 332,333). The post processing steps that may be performed during step 210may be include an anneal step, a clean step, a metrology step or othersimilar types of processing steps that are commonly performed on aftermetallizing a surface of the substrate. In one embodiment, an annealingstep is performed on the solar cell substrate to reduce or even out theintrinsic stress contained in the formed metal layers. In one aspect,the annealing process is performed at a temperature between about 200and 450° C. in a low partial pressure of nitrogen environment. In oneaspect, an anneal process is used to enhance the electrical contactbetween the formed metal layers and/or the adhesion of the metal layersto the substrate surface, and silicide formation.

In one embodiment of the batch plating apparatuses, described above inrelation to FIGS. 7A-7C, the electrolyte solution is removed from theplating tank 751 (FIGS. 7A and 7B) after processing and then a rinsingprocess is performed on the metallized substrates contained in each ofthe batch plating apparatuses 701. The rinsing process may include a DIwater rinse and a spin dry step (e.g., rotating the head assembly 405)to remove the electrolyte from the surface of the substrate and dry thesubstrates.

Alternate Deposition Techniques Using a Masking Plate

FIG. 8 illustrates a series of method steps 800 that are used to formmetal contact structures on a solar cell device using the apparatusdescribed herein. The processes described below may be used to form asolar cell having interconnects formed using any conventional deviceinterconnection technique. Thus while the embodiments described hereinare discussed in conjunction with the formation of a device that has theelectrical contacts to the n-type and p-type junctions on opposing sidesof the substrate this interconnect configuration is not intended to belimiting as to the scope of the invention, since other deviceconfigurations, such as PUM or multilayer buried contact structures(both contacts on one side), may be formed using the apparatus andmethods described herein without varying from the basic scope of theinvention.

FIGS. 9A-9E illustrate the various states of a metallized substrate 320after each step of method steps 800 has been performed. The method steps800 start with step 802 in which a substrate 301 (FIG. 9A) is formedusing conventional solar cell and/or semiconductor fabricationtechniques. The substrate 301 may be formed using the steps described instep 202, discussed above. Referring to FIGS. 8 and 9B, in the nextstep, step 804, a blanket seed layer 321A is deposited over the surfaceof the substrate 301. In general, a blanket seed layer 321A may bedeposited using a physical vapor deposition (PVD), chemical vapordeposition (CVD), molecular beam epitaxy (MBE), or atomic layerdeposition (ALD) process.

In the next step, step 806, the masking plate 410 (FIGS. 4A-4D) is usedto mask regions of the blanket seed layer 321A and preferentially exposeregions of the blanket seed layer 321A where the metal layer 322 of theconductors 325 are to be formed. Referring to FIG. 9C, during the step806 an aperture (i.e., aperture 413 in FIG. 4A-4D) in the masking plate(reference numeral 410 in FIGS. 4A-4D) is positioned over a portion ofthe blanket seed layer 321A so that a conductor 325 can be formedthereon using of the apparatuses, chemicals and methods discussed inconjunction with step 206 above. In this process step, the blanket seedlayer 321A is cathodically biased relative to an electrode (referencenumeral 420 in FIGS. 4A-4D) using a power supply that causes the ions inan electrolyte to form a metal layer 322 on the exposed areas of theblanket seed layer 321A created within the apertures in the maskingplate.

Referring to FIGS. 8 and 9D, in step 808, an optional contact interfacelayer 323 is deposited over the surface of the metal layer 322 formedduring step 806. The contact interface layer 323 can be formed using anelectrochemical deposition process that utilizes a masking plate(reference numeral 410 in FIGS. 4A-4D) to preferentially form aninterface layer 323 over the metal layer 322 formed in step 806. Theinterface layer 323 formed in step 808 may be formed using theapparatus, chemicals and methods described above in conjunction withstep 208.

Finally, in step 810, as shown in FIG. 9E, the blanket seed layer 321Ais removed from surface of the substrate. The blanket seed layer removalstep generally entails performing a conventional wet or dry etching stepto remove any unwanted and/or excess metal found on the surface of thesubstrate, such as unused portions of the blanket seed layer 321A.Conventional wet etching steps may involve immersing the substrate in anacidic or basic solution that is adapted to remove the unwanted and/orexcess metal on the surface of the substrate. In one embodiment, a wetetch chemistry that preferentially etches the seed layer 321A versus thematerial in the interface layer 323 is used. In one embodiment, abackside metallization process is performed on the metallized substrate320 after step 810 by use of a process similar to the one discussedabove in conjunction the FIG. 3F, described above.

In an alternate embodiment, step 810 is performed prior to performingstep 808. In this configuration, after the excess blanket seed layer321A is removed from the surface of the metallized substrate 321A, thusleaving the metal layer 322 or a good portion thereof, so that theinterface layer 323 can be preferentially formed on the metal layer 322using an electroless deposition process, a conventional selective CVDdeposition process, electrochemical deposition process, or othercomparable deposition processes.

Alternate Deposition Processes

Conventional methods of forming metallized structures using aconventional screen printing type process are unreliable and expensive.In an effort to improve solar cell metallization processes the followingmethods may be used to form conductors 325 on a surface of themetallized substrate 320. The method includes the use of a multistepprocess to form a desired pattern of metallized features on thesubstrate surface. FIG. 10 illustrates a series of method steps 1000that can be used to form the conductors 325 on a surface of the solarcell substrate. FIGS. 11A-11I illustrate the various states of ametallized substrate 320 after each step of method steps 1000 has beenperformed. The method steps 1000 start with step 1002 in which asubstrate 301 (FIG. 11A) is formed using conventional solar cell and/orsemiconductor fabrication techniques. The substrate 301 may be formedusing the steps described in step 202, discussed above. In the nextstep, step 1004 as shown in FIGS. 10 and 11B, blanket seed layer 321A isdeposited over the surface of the substrate 301. In general, a blanketseed layer 321A may be deposited using a physical vapor deposition(PVD), chemical vapor deposition (CVD), molecular beam epitaxy (MBE), oratomic layer deposition (ALD) process.

In the next step, step 1004, as shown in FIG. 11C, a masking layer 821is deposited over the blanket seed layer 321A. In general, the maskinglayer 821 is a non-conductive material that can be deposited on asurface of the substrate. In one embodiment, the masking layer is anorganic material, such as photoresist, that is deposited on the blanketseed layer 321A by use of a conventional spin-coating, CVD or othersimilar process.

In the next step, step 1006, the masking layer 821 is patterned toexpose regions of the substrate surface where conductors are to beformed. Referring to FIG. 11D, during the step 1006 an aperture 822 isformed in the masking layer 821 to expose the blanket seed layer 321A byuse of conventional photolithography exposure and chemical developsteps, laser ablation, or other methods of preferentially removingregions of a masking layer.

In one embodiment of the method steps 1000, steps 1004 and 1006 arecombined so that a patterned layer is directly formed on the surface ofthe blanket seed layer 321A. In this case the masking layer 821 isdirectly formed in a patterned configuration (i.e., having apertures 822form therein), similar to FIG. 11D, by use of a screen-printing, ink-jetprinting, rubber stamping, or other similar process that deposits amaterial that cannot be “plated on” on the substrate surface. In oneembodiment, the masking layer 821 is a non-conductive material, such anorganic material. In this configuration the masking layer 821 that candirectly deposits a patterned masking layer material on the surface ofthe substrate.

In the next step, step 1008, the conductors 325 are formed in theapertures 822 by use of an electrochemical plating process. In oneembodiment, step 1008 uses the processes and chemistries described abovein conjunction with step 206. In this process step, the blanket seedlayer 321A is cathodically biased relative to an electrode (not shown)using a power supply that causes the ions in an electrolyte to form ametal layer 322 on the exposed areas of the blanket seed layer 321Acreated within the apertures 822. In this configuration the maskingplate 410 used in steps 206-208 is not needed, since the masking layer821 contains a desired pattern that is used to form the depositedconductors 325. In one embodiment, the light-receiving side of the solarcell may have a metal pattern similar to the pattern shown in FIG. 1D,which is discussed above.

Referring to FIG. 11F, in the next step, step 1010, the patternedmasking layer 821 is removed from surface of the blanket seed layer321A. The masking layer 821 can be removed by use of a liquid solvent,RF plasma oxidation process (e.g., conventional ashing processes),thermal baking processing, or other similar conventional techniques.

In the next step, step 1012, as shown in FIG. 11G, the blanket seedlayer 321A is removed from surface of the substrate. The blanket seedlayer removal step generally entails performing a conventional wet ordry etching step to remove any unwanted and/or excess metal on thesurface of the substrate, such as unused portions of the blanket seedlayer 321A. Conventional wet etching steps may involve immersing thesubstrate in an acidic or basic solution that is adapted to remove theunwanted and/or excess metal on the surface of the substrate.

Referring to FIGS. 10 and 11H, in step 1014 an optional contactinterface layer 323 is deposited over the surface of the metal layer 322formed during step 1008. The contact interface layer 323 can be formedusing an electrochemical deposition process, an electroless depositionprocess, a CVD deposition process, or other comparable depositionprocesses to form a good ohmic contact between the formed conductors 325and an external interconnection bus (not shown) that is adapted toconnect one or more solar cells together. Step 1014 may be used to formthe metal layer 323 using of the chemicals and methods described abovein conjunction with step 208. In one embodiment of the method steps1000, the contact interface layer 323 is deposited over the surface ofthe metal layer 322, using step 1014, prior to removing the patternedmasking layer 821 using step 1012.

In one embodiment, a backside metallization process is performed on themetallized substrate 320 by use of a process similar to the onediscussed above in conjunction the FIG. 3F, described above.

While the foregoing is directed to embodiments of the present invention,other and further embodiments of the invention may be devised withoutdeparting from the basic scope thereof, and the scope thereof isdetermined by the claims that follow.

1. An apparatus for forming a metal layer on a substrate, comprising: amasking plate having a body, a first surface and a second surface, themasking plate having a plurality of apertures that extend through thebody between the first surface and the second surface; an electricalcontact formed on the first surface of the masking plate and incommunication with a power supply; a thrust plate that is adapted tourge a metallized surface of a substrate against the electrical contactand the first surface of the masking plate; and an electrode that is inelectrical communication with the power supply, the power supplyconfigured to electrically bias the electrode relative to the electricalcontact.
 2. The apparatus of claim 1, wherein the masking plate isformed from a material selected from the group consisting of glass,plastic and ceramic.
 3. The apparatus of claim 2, wherein the electricalcontact is formed from a material selected from the group consisting ofplatinum, gold, nickel, graphite and copper.
 4. The apparatus of claim1, wherein the electrode has a spiral shape.
 5. The apparatus of claim3, further comprising a diffuser plate that is positioned between theelectrode and the metallized surface, wherein the diffuser plate isadapted to rotate relative to the metallized surface of the substrate.6. The apparatus of claim 3, further comprising a diffuser plate that ispositioned between the electrode and the metallized surface, wherein thediffuser plate is adapted to move linearly or vibrate relative to themetallized surface of the substrate.
 7. An apparatus for forming a metallayer on a solar cell substrate, comprising: a masking plate comprisinga body formed of dielectric material, a first surface and a secondsurface, the masking plate having a plurality of apertures that extendthrough the body between the first surface and the second surface; aplurality of electrical contacts formed on the first surface of themasking plate; a thrust plate adapted to urge a surface of a substrateagainst the plurality of electrical contacts and the first surface ofthe masking plate; an actuator coupled to the thrust plate; and anelectrode that is in electrical communication with a power supply,wherein the power supply is configured to electrically bias theelectrode relative to the plurality of electrical contacts.
 8. Theapparatus of claim 7, wherein the electrode is non-consumable.
 9. Theapparatus of claim 7, wherein the electrode is consumable.
 10. Theapparatus of claim 7, wherein the electrode is formed from a materialselected from the group consisting of titanium, platinum, copper andphosphorus.
 11. The apparatus of claim 8, further comprising a polymericmaterial disposed at least partially on the first surface of the maskingplate.
 12. The apparatus of claim 11, wherein the plurality ofelectrical contacts are formed from a material selected from the groupconsisting of platinum, gold, nickel, graphite and copper.
 13. Anapparatus for forming a metal layer on a solar cell substrate,comprising: a masking plate comprising a body, a first surface and asecond surface, the masking plate having a plurality of apertures thatextend through the body between the first surface and the secondsurface; a plurality of electrical contacts at least partially recessedwithin the first surface of the masking plate; a thrust plate adapted tourge a surface of a substrate against the plurality of electricalcontacts and the first surface of the masking plate; and anon-consumable electrode electrically coupled to a power supply, whereinthe power supply is configured to electrically bias the non-consumableelectrode relative to the plurality of electrical contacts.
 14. Theapparatus of claim 13, wherein the masking plate is formed from amaterial selected from the group consisting of glass, plastic andceramic.
 15. The apparatus of claim 14, further comprising a polymericmaterial disposed at least partially on the first surface of the maskingplate.
 16. The apparatus of claim 15, wherein the plurality ofelectrical contacts are formed from a material selected from the groupconsisting of platinum, gold, nickel, graphite or copper.
 17. Theapparatus of claim 16, wherein the electrode is formed from a materialselected from a group consisting of titanium, platinum, copper andphosphorus.
 18. The apparatus of claim 17, wherein the plurality ofapertures extending through the body form a pattern of interdigitatedgrid lines.
 19. The apparatus of claim 18, wherein the surface area ofthe electrode is about 2 to about 10 times greater than the crosssectional area of the plurality of apertures.
 20. The apparatus of claim19, wherein the electrode has a spiral shape.